NXP Semiconductors P89LPC9321 UM10310 User Manual Page 134
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UM10310_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 1 December 2008 134 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
20. Legal information
20.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
20.2 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
20.3 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I
2
C-bus — logo is a trademark of NXP B.V.
- P89LPC9321 User manual 1
- Contact information 2
- 1. Introduction 3
- 1.2 Pin description 5
- 1.3 Functional diagram 8
- 1.4 Block diagram 9
- NXP Semiconductors 10
- 1.6 Memory organization 20
- 2. Clocks 21
- 2.4 Clock output 22
- 3. Interrupts 25
- 4. I/O ports 28
- 4.1 Port configurations 29
- 4.4 Input-only configuration 31
- 4.7 Additional port features 32
- 5. Power monitoring functions 33
- 5.2 Power-on detection 34
- 5.3 Power reduction modes 34
- 6. Reset 37
- 6.1 Reset vector 38
- 7. Timers 0 and 1 39
- 7.1 Mode 0 40
- 7.2 Mode 1 40
- 002aae091 44
- 8.2 Changing RTCS1/RTCS0 45
- 9. Capture/Compare Unit (CCU) 47
- 9.3 Basic timer operation 48
- 9.4 Output compare 50
- 9.5 Input capture 51
- 9.6 PWM operation 52
- 9.7 Alternating output mode 53
- 9.9 HALT 54
- 9.10 PLL operation 55
- 10. UART 59
- 10.4 Mode 3 60
- 10.5 SFR space 60
- 10.8 Framing error 61
- 10.9 Break detect 61
- 10.10 More about UART Mode 0 63
- 002aaa925 64
- 10.14 Break detect 66
- 10.15 Double buffering 66
- C interface 70
- C data register 71
- C slave address register 71
- C control register 72
- C Status register 73
- C operation modes 74
- 002aaa900 85
- 12.1 Configuring the SPI 88
- 12.4 Mode change on SS 89
- 12.5 Write collision 90
- 12.6 Data mode 90
- 13. Analog comparators 94
- 13.3 Comparator input pins 96
- 13.4 Comparator interrupt 96
- 14. Keypad interrupt (KBI) 100
- 15. Watchdog timer (WDT) 101
- 002aae092 102
- 5 PRE+() 103
- 15.3 Watchdog clock source 105
- 16. Additional features 107
- 16.2 Dual Data Pointers 108
- 16.1 Software reset 108
- 17. Data EEPROM 109
- 17.1 Data EEPROM read 110
- 17.2 Data EEPROM write 110
- 17.3 Hardware reset 111
- 17.6 Data EEPROM Row Fill 111
- 18. Flash memory 112
- 18.7 Boot ROM 117
- 18.13 IAP authorization key 122
- 18.14 Flash write enable 122
- 18.16 IAP error status 123
- 18.18 User security bytes 128
- 18.19 Boot Vector register 129
- 18.20 Boot status register 129
- 19. Instruction set 131
- 20. Legal information 134
- 21. Tables 135
- 22. Figures 137
- 23. Contents 138
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